This disclosure relates generally to patterning of substrates including semiconductor substrates such as silicon wafers. This disclosure also relates to processes involved with photolithography including coating and developing films on substrates as part of semiconductor device fabrication. This disclosure particularly relates to controlling dimensions and accuracy of patterned features as part of photolithography and patterning processes.
Photolithography involves coating substrates with films that are sensitive to electromagnetic (EM) radiation, exposing these films to a pattern of a EM radiation to define a latent pattern within the film, and then developing away some of the film to reveal a physical or relief pattern on the substrate. Preparation and development of such films can include thermal treatment or baking. For example, a newly applied film can require a post-application bake (PAB) to evaporate solvents and/or to increase structural rigidity or etch resistance. Also, a post-exposure bake (PEB) can be executed to set a given pattern to prevent further dissolving. Fabrication tools for coating and developing substrate typically include many modules that can be used to add film, add resist, and develop a substrate.